Resume of Antonio F Mondragon, Ph.D.

DIGITAL ARCHITECTURES / SYSTEMS /
ANALOG & MIXED SIGNAL
DESIGN AND VERIFICATION ENGINEER

antoniofmondragon@ieee.org

Extensive experience in Research and Development from Concept to Silicon. Strong technical skills, starting with a high level of abstraction, system modeling, design, simulation, prototyping and integrated circuit implementation in both digital and analog domains. Proficient in critical design tools and languages for system, digital, analog and mixed mode design and verification.  Highly effective in working with cross-functional / international teams.

TECHNICAL SKILLS

Programming Languages: Matlab, Simulink, Maple, C, C++(basic)
Assembly Language (68000, 80×86, TMS320x2x/5x/6x, 8051, 68HC11, PIC16x/17x).
HDL and Scripting Languages: Verilog, VHDL, Perl, Unix Shell, System-C(basic), Verilog-A (basic).
EDA Tools: Cadence, Modelsim, Analog Circuit Studio, Spectre, Spice, Reliability Tools, SPW, SystemView, Synopsys, Synplicity, Xilinx, Altera, Clearcase, DesignSync, Pico Express, Catapult C.

PROFESSIONAL EXPERIENCE

TEXAS INSTRUMENTS INC, Dallas, TX                          2002-2008

nM Analog Integration, Analog Platform Branch

Analog Intellectual Property (IP) Verification Lead Engineer (2008-2008)

Due to the constant silicon re-spins on Analog IP modules, implemented and led an engineering team that unified the verification methodologies for analog and mixed signal designs.

• Established the methodology and proposed guidelines for analog sub-IP/IP verification, behavioral model qualification and technology re-verification.
• Surveyed the best practices across the group to be incorporated into the methodology.
• Proposed verification flows and tools usage to make more efficient use of human/computing/time resources.
• Heavy use of Cadence tools, Fast-Spice simulators, Statistical simulators, as well as co-simulation.
• Unix shell and Perl scripts usage was incorporated for translation and automation.

Digital Signal Processing Solution R&D Center, Broadband Architectures Group

Long Term Evolution (LTE) Precoder Module Design Engineer (2007- 2008)

For the LTE Precoder used in the transmitter path, specified the high-level architecture followed by complete design and verification.  Project involved the design of a non-power of two Discrete Fourier Transform (DFT) using Electronic System Level (ESL) tools. The objective was to develop a single fixed point C model to directly translate to RTL for simulation, FPGA prototyping and ASIC implementation.

• Proposed Prime Factor Discrete Fourier Transform architecture.
• Modeled the Precoder System using Matlab, including fixed point trade offs analysis and Signal to Quantization Noise Ratio (SQNR) evaluation.
• Designed using C language and Electronic System Level tool (C to Verilog RTL synthesis tool).
• Delivered LTE Precoder module for top level integration and was verified on first pass.
• The complete module was written and verified exclusively using standard ANSI-C from conceptualization to FPGA prototyping and ASIC synthesis. The tool used was Pico Express.

Wimax Transmitter FPGA Module Integration and Verification Lead Engineer (2005- 2007)

Led integration and verification for the Wimax (802.16e) baseband transmitter FPGA module.

• Designed Forward Error Correcting (FEC) Register Transfer Level (RTL) modules
• Block Turbo Decoder, Convolutional Encoder and Turbo Encoder
• Designed MAC to PHY interface RTL module.
• Completed RTL module integration, verification and FPGA laboratory first demonstration in Dec’06.
• Designed and integrated Hybrid Automatic Request (HARQ) manager RTL module.
• Complete transmitter integration and FPGA verification in the laboratory in Aug’07.
• The tools used were Modelsim, Synplicity, Xilinx P&R, Synopsys synthesis.

Digital Television Module RTL Design Engineer (2004- 2005)

Worked across multi-national teams to deliver a first pass silicon single chip digital television integrated circuit.  Team won the “Innovators in Action” award for achievement to go from concept to working silicon in a very short time.

• Designed modules for Digital Video Broadcasting for Handheld (DVB-H/Europe) and Integrated Services Digital Broadcasting Terrestrial (ISDB-T/Japan) standards:
• Time Domain Synchronization (DVB-H/ISDB-T), FFT Bit Reversal (DVB-H/ISDB-T), Post FFT Phase and Gain Adjustment (DVB-H/ISDB-T), Tone Separation and Phase descrambling (ISDB-T) and TMCC Decoder (ISDB-T).
• Configured FPGA synthesis and place and route tool flows for time domain processing.
• Established RTL Power estimation methodology for DVB-H/ISDB-T mixed language design.
• Tools used: Modelsim, Synplicity, Xilinx P&R, Synopsys synthesis.

Digital Signal Processing Solution R&D Center, Mobile Wireless Group

Chip Level Equalizer for 3G Cellular Wireless Module RTL Design Engineer (2002- 2004)

To facilitate integration of a 3G cellular WCDMA chipset, developed a chip level equalizer (CLE) required to deliver the high data rate throughput specified in HSDPA. CLE design resulted in a patent.

• Setup a methodology to generate hardware estimates, and obtained complexity values for both chip level equalizer and interference cancellation.
• Participated in the decision process as to which technique was to be implemented in the first stage of HSDPA coprocessor development.
• Worked through the process of setting the technical specifications for the CLE and started to work on the design from concept to implementation and testing.
• Proposed an innovative CLE Reconfigurable Architecture (submitted patent application).
• Integrated receive and transmit diversity modes into CLE Reconfigurable Architecture and updated the fixed point C model (submitted additional patent with extensions).
• The tools used included Mentor’s HDL Designer series, Synplicity, Xilinx P&R and Synopsys synthesis tools.

ADDITIONAL RELEVANT EXPERIENCE

Communications Systems Development Manager                    PCTV (Mexico City)
R&D Manager in charge of Teletext Products and Operation    TVSCOM (Mexico City)
Teletext Systems Design Engineer                                           TVSCOM (Mexico City)

EDUCATION

Ph.D.  EE  Texas A&M University (College Station, TX, USA)
M.Sc.  EE  Universidad Nacional Autonoma de Mexico (Mexico City, Mexico)
B.Sc.   EE  Universidad Iberoamericana (Mexico City, Mexico)